Representation of multiple-valued logic functions /
Compared to binary switching functions, the multiple-valued functions (MV) offer more compact representations of the information content of signals modeled by logic functions and, therefore, their use fits very well in the general settings of data compression attempts and approaches. The first task...
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Main Author: | |
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Other Authors: | , |
Format: | Electronic eBook |
Language: | English |
Published: |
Cham, Switzerland :
Springer,
[2012]
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Series: | Synthesis lectures on digital circuits and systems ;
#37. |
Subjects: | |
Online Access: | Connect to this title online |
MARC
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100 | 1 | |a Stanković, Radomir S. |0 http://id.loc.gov/authorities/names/n91044259 | |
245 | 1 | 0 | |a Representation of multiple-valued logic functions / |c Radomir S. Stanković, Jaakko T. Astola, Claudio Moraga. |
264 | 1 | |a Cham, Switzerland : |b Springer, |c [2012] | |
264 | 4 | |c ©2012 | |
300 | |a 1 online resource (xiii, 154 pages) : |b illustrations. | ||
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490 | 1 | |a Synthesis lectures on digital circuits and systems, |x 1932-3174 ; |v #37 | |
500 | |a Part of: Synthesis digital library of engineering and computer science. | ||
504 | |a Includes bibliographical references (pages 127-150) and index. | ||
505 | 0 | |a Acknowledgments -- 1. Multiple-valued logic functions -- 1.1 Tabular representations -- 1.2 Cubes -- 1.3 Encoding of variables -- 1.4 Other representations -- 1.5 Algebraic structures for multiple-valued functions -- 1.6 Functions with various properties. | |
505 | 8 | |a 2. Functional expressions for multiple-valued functions -- 2.1 Functional expressions -- 2.2 Generalizations to multiple-valued functions -- 2.3 Sum-of-product expressions -- 2.4 Galois field expressions -- 2.5 Fixed-polarity GF-expressions -- 2.6 Efficiency of representations -- 2.7 Arithmetic expressions for multiple-valued functions -- 2.8 Haar-like expressions for multiple-valued functions -- 2.9 Sparse representations from covering codes. | |
505 | 8 | |a 3. Spectral representations of multiple-valued functions -- 3.1 Fourier representations of logic functions -- 3.2 Construction of group characters -- 3.3 Haar series for multiple-valued logic functions. | |
505 | 8 | |a 4. Decision diagrams for multiple-valued functions -- 4.1 Decision trees and decision diagrams -- 4.2 Reduction rules -- 4.3 Multiple-place decision diagrams -- 4.4 Reduction of decision trees -- 4.5 Functional decision diagrams for MV functions -- 4.6 Reed-Muller-Fourier decision diagrams -- 4.7 Vilenkin-Chrestenson decision diagrams -- 4.8 Haar spectral transform decision diagrams -- 4.9 Edge-valued decision diagrams -- 4.10 Construction of EVDDs -- 4.11 Construction of transforms from decision diagrams. | |
505 | 8 | |a 5. Fast calculation algorithms -- 5.1 Illustrative examples of FFT-like algorithms -- Bibliography -- Authors' biographies -- Index. | |
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520 | 3 | |a Compared to binary switching functions, the multiple-valued functions (MV) offer more compact representations of the information content of signals modeled by logic functions and, therefore, their use fits very well in the general settings of data compression attempts and approaches. The first task in dealing with such signals is to provide mathematical methods for their representation in a way that will make their application in practice feasible. | |
588 | 0 | |a Online resource; title from PDF title page (Morgan & Claypool, viewed Sept. 27, 2012). | |
650 | 0 | |a Many-valued logic |x Mathematical models. | |
650 | 0 | |a Signal processing |x Digital techniques |x Mathematical models. | |
650 | 0 | |a Logic design. |0 http://id.loc.gov/authorities/subjects/sh85078117 | |
650 | 7 | |a Logic design. |2 fast |0 (OCoLC)fst01002045 |0 http://id.worldcat.org/fast/1002045 | |
650 | 7 | |a Signal processing |x Digital techniques |x Mathematical models. |2 fast |0 (OCoLC)fst01118293 |0 http://id.worldcat.org/fast/1118293 | |
650 | 7 | |a Many-valued logic. |2 fast |0 (OCoLC)fst01008548 | |
650 | 7 | |a Mathematical models. |2 fast |0 (OCoLC)fst01012085 | |
650 | 7 | |a Signal processing. |2 fast |0 (OCoLC)fst01118281 | |
700 | 1 | |a Astola, Jaakko. |0 http://id.loc.gov/authorities/names/n80021585 | |
700 | 1 | |a Moraga, Claudio. |0 http://id.loc.gov/authorities/names/no2005076725 | |
740 | 0 | |a Springer Nature Synthesis Collection of Technology Collection 4. | |
776 | 0 | 8 | |i Print version: |t Representations of Multiple-valued Logic Functions. |d Morgan & Claypool 2012 |z 9781608459421 |w (OCoLC)798611484 |
830 | 0 | |a Synthesis lectures on digital circuits and systems ; |v #37. |0 http://id.loc.gov/authorities/names/no2008023621 | |
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